Chengjie Liu

Education

2023-Present | Ph.D. Candidate, Intelligence Sensing and Communication Lab (ISCL), Nanjing University (NJU)

Advisors: Prof. Li Du, Prof. Yuan Du

2019-2023 | Bachelor's Degree, School of Electronic Science and Engineering, Nanjing University (NJU)

Research Experience

Research Intern, National Center of Technology Innovation for EDA (NCTIEDA)

Advisor: Prof. Jun Yang

Research Interests

Knowledge-driven agile design of analog integrated circuits, AI/LLM for circuit design, diffusion models for circuit generation, multi-agent systems for EDA

Publications

Note: Chengjie Liu indicates the author's name.

Preprints

• LADAC: Large Language Model-driven Auto-Designer for Analog Circuits
  Chengjie Liu, Yijiang Liu, Yuan Du, and Li Du*
  TechRxiv, 2024
• AmpAgent: An LLM-based Multi-Agent System for Multi-stage Amplifier Schematic Design from Literature for Process and Performance Porting
  Chengjie Liu, Weiyu Chen, Anlan Peng, Yuan Du, Yang Jun, and Li Du*
  arXiv:2409.14739, 2024

Journal Articles

• IC + AI: A no-human-in-loop design paradigm?
  Chengjie Liu, and Jun Yang*
  Science China - Information Science, 2025
• A Contactless Glucose Solution Concentration Measurement System Based on Improved High Accurate FMCW Radar Algorithm
  Chengjie Liu, Yuan Du, and Li Du*
  Sensors (MDPI), Vol. 22, No. 11, 2022

Conference Papers

• DiffCkt: A Diffusion Model-Based Hybrid Neural Network Framework for Automatic Transistor-Level Generation of Analog Circuits
  Chengjie Liu, Jiajia Li, Yabing Feng, Wenhao Huang, Weiyu Chen, Yuan Du, Jun Yang, and Li Du*
  IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2025
• A Large Language Model-based Multi-Agent Framework for Analog Circuits' Sizing Relationships Extraction
  Chengjie Liu, Weiyu Chen, Huiyao Xu, Yuan Du, Jun Yang, and Li Du*
  International Symposium on EDA (ISEDA), 2025
• PARADIGM: Pareto-Optimized Analog Design via Intelligent Database-Guided Methodology
  Anlan Peng, Chengjie Liu, Yuan Du, and Li Du*
  International Symposium on EDA (ISEDA), 2026
• Late Breaking Results: LLM-Guided Deferred Shape Exploration for Signal-Flow-Driven Analog Floorplanning
  Yu Chen, Fuxing Huang, Chengjie Liu, Xi Wang, and Ziran Zhu*
  Design Automation Conference (DAC), 2026
• Image2Net: Datasets, Benchmark and Hybrid Framework to Convert Analog Circuit Diagrams into Netlists
  Haohang Xu, Chengjie Liu, Qihang Wang, Wenhao Huang, Yongjian Xu, Weiyu Chen, Anlan Peng, Zhijun Li, Bo Li, Lei Qi, Jun Yang, Yuan Du, and Li Du*
  International Symposium on EDA (ISEDA), 2025
• AnalogTester: A Large Language Model-Based Framework for Automatic Testbench Generation in Analog Circuit Design
  Weiyu Chen, Chengjie Liu, Wenhao Huang, Jinyang Lyu, Mingqian Yang, Yuan Du, Li Du*, and Jun Yang
  International Symposium on EDA (ISEDA), 2025
• MMCircuitEval: A Comprehensive Multimodal Circuit-Focused Benchmark for Evaluating LLMs
  Chenchen Zhao, Zhengyuan Shi, Xiangyu Wen, Chengjie Liu, Yi Liu, Yunhao Zhou, Yuxiang Zhao, Hefei Feng, Yinan Zhu, Waa Gwok-Wan, Xin Cheng, Weiyu Chen, Yongqi Fu, Chujie Chen, Chenhao Xue, Ying Wang, Yibo Lin, Jun Yang, Ning Xu, Xi Wang and Qiang Xu*
  IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2025
• A Novel CNN-Based Design Framework for Incorporating Electrical Chip-Package Interaction with Application to Bandgap Reference Design
  Zilj Zhao, Chengjie Liu, Zhonglei Yang, Pengxiang Li, Zhaohan Wang, Yaling Li, Chengao Zhang, and Lixin Ge*
  International Symposium on EDA (ISEDA), 2026

Selected Awards

• National Top 100 Graduate Student Communist Party Member Model, 2026
• Special Prize of Dongliang Scholarship, Nanjing University, 2022
• The 2023 Personages of Nanjing University, Nanjing University, 2023

Teaching

• Teaching Assistant, The Application and Practice of Large Language Models in the Field of Chip Design, Fall Semester, Nanjing University

Academic Impact

• Total citations exceed 100 (Google Scholar)
• LADAC is regarded as the first to use LLM Agents for analog circuit design by multiple studies